{"@ID": "1342", "@Name": "Information Exposure through Microarchitectural State after Transient Execution", "@Abstraction": "Base", "@Structure": "Simple", "@Status": "Incomplete", "Description": "The processor does not properly clear microarchitectural state after incorrect microcode assists or speculative execution, resulting in transient execution.", "Extended_Description": {"xhtml:p": ["In many processor architectures an exception, mis-speculation, or microcode assist results in a flush operation to clear results that are no longer required. This action prevents these results from influencing architectural state that is intended to be visible from software. However, traces of this transient execution may remain in microarchitectural buffers, resulting in a change in microarchitectural state that can expose sensitive information to an attacker using side-channel analysis. For example, Load Value Injection (LVI) [REF-1202] can exploit direct injection of erroneous values into intermediate load and store buffers.", "Several conditions may need to be fulfilled for a successful attack:"], "xhtml:ol": {"xhtml:li": ["incorrect transient execution that results in remanence of sensitive information;", "attacker has the ability to provoke microarchitectural exceptions;", "operations and structures in victim code that can be exploited must be identified."]}}, "Related_Weaknesses": {"Related_Weakness": [{"@Nature": "ChildOf", "@CWE_ID": "226", "@View_ID": "1000", "@Ordinal": "Primary"}, {"@Nature": "ChildOf", "@CWE_ID": "226", "@View_ID": "1194", "@Ordinal": "Primary"}]}, "Weakness_Ordinalities": {"Weakness_Ordinality": {"Ordinality": "Primary"}}, "Applicable_Platforms": {"Language": {"@Class": "Not Language-Specific", "@Prevalence": "Undetermined"}, "Operating_System": {"@Class": "Not OS-Specific", "@Prevalence": "Undetermined"}, "Architecture": [{"@Class": "Workstation", "@Prevalence": "Undetermined"}, {"@Name": "x86", "@Prevalence": "Undetermined"}, {"@Name": "ARM", "@Prevalence": "Undetermined"}, {"@Name": "Other", "@Prevalence": "Undetermined"}], "Technology": [{"@Class": "Not Technology-Specific", "@Prevalence": "Undetermined"}, {"@Class": "System on Chip", "@Prevalence": "Undetermined"}]}, "Modes_Of_Introduction": {"Introduction": [{"Phase": "Architecture and Design"}, {"Phase": "Requirements"}]}, "Common_Consequences": {"Consequence": {"Scope": ["Confidentiality", "Integrity"], "Impact": ["Modify Memory", "Read Memory", "Execute Unauthorized Code or Commands"], "Likelihood": "Medium"}}, "Potential_Mitigations": {"Mitigation": [{"Phase": ["Architecture and Design", "Requirements"], "Description": "Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level.", "Effectiveness": "High", "Effectiveness_Notes": "Being implemented in silicon it is expected to fully address the known weaknesses with limited performance impact."}, {"Phase": "Build and Compilation", "Description": "Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.", "Effectiveness": "High", "Effectiveness_Notes": "This effectively forces the processor to complete each memory access before moving on to the next operation. This may have a large performance impact."}]}, "Demonstrative_Examples": {"Demonstrative_Example": {"Intro_Text": "Faulting loads in a victim domain may trigger incorrect transient forwarding, which leaves secret-dependent traces in the microarchitectural state. Consider this example from [REF-1203].", "Body_Text": ["Consider the code gadget:", {"xhtml:p": ["A processor with this weakness will store the value of untrusted_arg (which may be provided by an attacker) to the stack, which is trusted memory. Additionally, this store operation will save this value in some microarchitectural buffer, e.g. the store queue.", "In this code gadget, \n\t\t\t\t\ttrusted_ptr is dereferenced while the attacker forces a page fault. The faulting load causes the processor to mis-speculate by forwarding untrusted_arg as the (speculative) load result. The processor then uses untrusted_arg for the pointer dereference. After the fault has been handled and the load has been re-issued with the correct argument, secret-dependent information stored at the address of trusted_ptr remains in microarchitectural state and can be extracted by an attacker using a code gadget."]}], "Example_Code": {"@Nature": "Bad", "@Language": "C", "xhtml:div": {"xhtml:br": null, "xhtml:div": {"@style": "margin-left:1em;", "xhtml:br": [null, null], "#text": "*arg_copy = untrusted_arg;\n\t\t\t\t\t      array[**trusted_ptr * 4096];"}, "#text": "void call_victim(size_t untrusted_arg) {\n\t\t\t\t\t    \n\t\t\t\t\t    }"}}}}, "Observed_Examples": {"Observed_Example": {"Reference": "CVE-2020-0551", "Description": "Load value injection in some processors utilizing speculative execution may allow an authenticated user to enable information disclosure via a side-channel with local access.", "Link": "https://www.cve.org/CVERecord?id=CVE-2020-0551"}}, "Related_Attack_Patterns": {"Related_Attack_Pattern": {"@CAPEC_ID": "696"}}, "References": {"Reference": [{"@External_Reference_ID": "REF-1202"}, {"@External_Reference_ID": "REF-1203"}, {"@External_Reference_ID": "REF-1204"}, {"@External_Reference_ID": "REF-1205"}]}, "Mapping_Notes": {"Usage": "Allowed", "Rationale": "This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.", "Comments": "Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.", "Reasons": {"Reason": {"@Type": "Acceptable-Use"}}}, "Notes": {"Note": [{"@Type": "Relationship", "#text": "CWE-1342 differs from CWE-1303, which is related to misprediction and biasing microarchitectural components, while CWE-1342 addresses illegal data flows and retention. For example, Spectre is an instance of CWE-1303 biasing branch prediction to steer the transient execution indirectly."}, {"@Type": "Maintenance", "#text": "As of CWE 4.9, members of the CWE Hardware SIG are closely analyzing this entry and others to improve CWE's coverage of transient execution weaknesses, which include issues related to Spectre, Meltdown, and other attacks. Additional investigation may include other weaknesses related to microarchitectural state. As a result, this entry might change significantly in CWE 4.10."}]}, "Content_History": {"Submission": {"Submission_Name": "Anders Nordstrom, Alric Althoff", "Submission_Organization": "Cycuity (originally submitted as Tortuga Logic)", "Submission_Date": "2021-09-22", "Submission_Version": "4.6", "Submission_ReleaseDate": "2021-10-28"}, "Modification": [{"Modification_Name": "CWE Content Team", "Modification_Organization": "MITRE", "Modification_Date": "2022-10-13", "Modification_Version": "4.9", "Modification_ReleaseDate": "2022-10-13", "Modification_Comment": "updated Demonstrative_Examples, Maintenance_Notes, Related_Attack_Patterns"}, {"Modification_Name": "CWE Content Team", "Modification_Organization": "MITRE", "Modification_Date": "2023-04-27", "Modification_Version": "4.11", "Modification_ReleaseDate": "2023-04-27", "Modification_Comment": "updated Relationships"}, {"Modification_Name": "CWE Content Team", "Modification_Organization": "MITRE", "Modification_Date": "2023-06-29", "Modification_Version": "4.12", "Modification_ReleaseDate": "2023-06-29", "Modification_Comment": "updated Mapping_Notes"}, {"Modification_Name": "CWE Content Team", "Modification_Organization": "MITRE", "Modification_Date": "2024-02-29", "Modification_Version": "4.14", "Modification_ReleaseDate": "2024-02-29", "Modification_Comment": "updated Description"}, {"Modification_Name": "CWE Content Team", "Modification_Organization": "MITRE", "Modification_Date": "2025-12-11", "Modification_Version": "4.19", "Modification_ReleaseDate": "2025-12-11", "Modification_Comment": "updated Weakness_Ordinalities"}]}}