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    <lastBuildDate>Thu, 01 Oct 2026 13:55:14 +0000</lastBuildDate>
    <item>
      <title>CVE-2026-45945 — iommu/vt-d: Fix race condition during PASID entry replacement</title>
      <link>https://vulnerability.circl.lu/vuln/cve-2026-45945</link>
      <description>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;iommu/vt-d: Fix race condition during PASID entry replacement&lt;/p&gt;
&lt;p&gt;The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing
an active PASID entry (e.g., during domain replacement), the current
implementation calculates a new entry on the stack and copies it to the
table using a single structure assignment.&lt;/p&gt;
&lt;p&gt;struct pasid_entry *pte, new_pte;&lt;/p&gt;
&lt;p&gt;pte = intel_pasid_get_entry(dev, pasid);
        pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);
        *pte = new_pte;&lt;/p&gt;
&lt;p&gt;Because the hardware may fetch the 512-bit PASID entry in multiple
128-bit chunks, updating the entire entry while it is active (Present
bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware
could observe an inconsistent state — partially new data and partially
old data — leading to unpredictable behavior or spurious faults.&lt;/p&gt;
&lt;p&gt;Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the
&amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and
the required invalidation handshake is completed before the new
configuration is applied.&lt;/p&gt;</description>
      <content:encoded>&lt;p&gt;&lt;strong&gt;Affected:&lt;/strong&gt; Linux&lt;/p&gt;
&lt;p&gt;In the Linux kernel, the following vulnerability has been resolved:&lt;/p&gt;
&lt;p&gt;iommu/vt-d: Fix race condition during PASID entry replacement&lt;/p&gt;
&lt;p&gt;The Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing
an active PASID entry (e.g., during domain replacement), the current
implementation calculates a new entry on the stack and copies it to the
table using a single structure assignment.&lt;/p&gt;
&lt;p&gt;struct pasid_entry *pte, new_pte;&lt;/p&gt;
&lt;p&gt;pte = intel_pasid_get_entry(dev, pasid);
        pasid_pte_config_first_level(iommu, &amp;amp;new_pte, ...);
        *pte = new_pte;&lt;/p&gt;
&lt;p&gt;Because the hardware may fetch the 512-bit PASID entry in multiple
128-bit chunks, updating the entire entry while it is active (Present
bit set) risks a &amp;#34;torn&amp;#34; read. In this scenario, the IOMMU hardware
could observe an inconsistent state — partially new data and partially
old data — leading to unpredictable behavior or spurious faults.&lt;/p&gt;
&lt;p&gt;Fix this by removing the unsafe &amp;#34;replace&amp;#34; helpers and following the
&amp;#34;clear-then-update&amp;#34; flow, which ensures the Present bit is cleared and
the required invalidation handshake is completed before the new
configuration is applied.&lt;/p&gt;</content:encoded>
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