cve-2023-52608
Vulnerability from cvelistv5
Published
2024-03-13 14:01
Modified
2024-11-04 14:49
Severity ?
Summary
firmware: arm_scmi: Check mailbox/SMT channel for consistency
Impacted products
LinuxLinux
LinuxLinux
Show details on NVD website


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                "timestamp": "2024-06-06T17:50:57.700750Z",
                "version": "2.0.3"
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    "cna": {
      "affected": [
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          "defaultStatus": "unaffected",
          "product": "Linux",
          "programFiles": [
            "drivers/firmware/arm_scmi/common.h",
            "drivers/firmware/arm_scmi/mailbox.c",
            "drivers/firmware/arm_scmi/shmem.c"
          ],
          "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
          "vendor": "Linux",
          "versions": [
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              "version": "5.15.149",
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              "lessThanOrEqual": "6.1.*",
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          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nfirmware: arm_scmi: Check mailbox/SMT channel for consistency\n\nOn reception of a completion interrupt the shared memory area is accessed\nto retrieve the message header at first and then, if the message sequence\nnumber identifies a transaction which is still pending, the related\npayload is fetched too.\n\nWhen an SCMI command times out the channel ownership remains with the\nplatform until eventually a late reply is received and, as a consequence,\nany further transmission attempt remains pending, waiting for the channel\nto be relinquished by the platform.\n\nOnce that late reply is received the channel ownership is given back\nto the agent and any pending request is then allowed to proceed and\noverwrite the SMT area of the just delivered late reply; then the wait\nfor the reply to the new request starts.\n\nIt has been observed that the spurious IRQ related to the late reply can\nbe wrongly associated with the freshly enqueued request: when that happens\nthe SCMI stack in-flight lookup procedure is fooled by the fact that the\nmessage header now present in the SMT area is related to the new pending\ntransaction, even though the real reply has still to arrive.\n\nThis race-condition on the A2P channel can be detected by looking at the\nchannel status bits: a genuine reply from the platform will have set the\nchannel free bit before triggering the completion IRQ.\n\nAdd a consistency check to validate such condition in the A2P ISR."
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    "assignerShortName": "Linux",
    "cveId": "CVE-2023-52608",
    "datePublished": "2024-03-13T14:01:48.870Z",
    "dateReserved": "2024-03-02T21:55:42.574Z",
    "dateUpdated": "2024-11-04T14:49:37.551Z",
    "state": "PUBLISHED"
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  "dataVersion": "5.1",
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    "nvd": "{\"cve\":{\"id\":\"CVE-2023-52608\",\"sourceIdentifier\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\",\"published\":\"2024-03-13T14:15:07.240\",\"lastModified\":\"2024-03-13T14:28:45.217\",\"vulnStatus\":\"Awaiting Analysis\",\"descriptions\":[{\"lang\":\"en\",\"value\":\"In the Linux kernel, the following vulnerability has been resolved:\\n\\nfirmware: arm_scmi: Check mailbox/SMT channel for consistency\\n\\nOn reception of a completion interrupt the shared memory area is accessed\\nto retrieve the message header at first and then, if the message sequence\\nnumber identifies a transaction which is still pending, the related\\npayload is fetched too.\\n\\nWhen an SCMI command times out the channel ownership remains with the\\nplatform until eventually a late reply is received and, as a consequence,\\nany further transmission attempt remains pending, waiting for the channel\\nto be relinquished by the platform.\\n\\nOnce that late reply is received the channel ownership is given back\\nto the agent and any pending request is then allowed to proceed and\\noverwrite the SMT area of the just delivered late reply; then the wait\\nfor the reply to the new request starts.\\n\\nIt has been observed that the spurious IRQ related to the late reply can\\nbe wrongly associated with the freshly enqueued request: when that happens\\nthe SCMI stack in-flight lookup procedure is fooled by the fact that the\\nmessage header now present in the SMT area is related to the new pending\\ntransaction, even though the real reply has still to arrive.\\n\\nThis race-condition on the A2P channel can be detected by looking at the\\nchannel status bits: a genuine reply from the platform will have set the\\nchannel free bit before triggering the completion IRQ.\\n\\nAdd a consistency check to validate such condition in the A2P ISR.\"},{\"lang\":\"es\",\"value\":\"En el kernel de Linux, se ha resuelto la siguiente vulnerabilidad: firmware: arm_scmi: comprueba la coherencia del buz\u00f3n/canal SMT Al recibir una interrupci\u00f3n de finalizaci\u00f3n, se accede al \u00e1rea de memoria compartida para recuperar el encabezado del mensaje al principio y luego, si el n\u00famero de secuencia del mensaje identifica una transacci\u00f3n que a\u00fan est\u00e1 pendiente, el payload relacionado tambi\u00e9n se recupera. Cuando se agota el tiempo de espera de un comando SCMI, la propiedad del canal permanece en la plataforma hasta que finalmente se recibe una respuesta tard\u00eda y, como consecuencia, cualquier intento de transmisi\u00f3n adicional permanece pendiente, esperando que la plataforma abandone el canal. Una vez que se recibe esa respuesta tard\u00eda, la propiedad del canal se devuelve al agente y cualquier solicitud pendiente puede continuar y sobrescribir el \u00e1rea SMT de la respuesta tard\u00eda reci\u00e9n entregada; luego comienza la espera de la respuesta a la nueva solicitud. Se ha observado que la IRQ espuria relacionada con la respuesta tard\u00eda puede asociarse err\u00f3neamente con la solicitud reci\u00e9n puesta en cola: cuando eso sucede, el procedimiento de b\u00fasqueda en curso de la pila SCMI se ve enga\u00f1ado por el hecho de que el encabezado del mensaje ahora presente en el \u00e1rea SMT es relacionado con la nueva transacci\u00f3n pendiente, aunque la respuesta real a\u00fan no ha llegado. Esta condici\u00f3n de ejecuci\u00f3n en el canal A2P se puede detectar observando los bits de estado del canal: una respuesta genuina de la plataforma habr\u00e1 configurado el bit libre del canal antes de activar la IRQ de finalizaci\u00f3n. Agregue una verificaci\u00f3n de coherencia para validar dicha condici\u00f3n en el ISR A2P.\"}],\"metrics\":{},\"references\":[{\"url\":\"https://git.kernel.org/stable/c/12dc4217f16551d6dee9cbefc23fdb5659558cda\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/437a310b22244d4e0b78665c3042e5d1c0f45306\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/614cc65032dcb0b64d23f5c5e338a8a04b12be5d\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/7f95f6997f4fdd17abec3200cae45420a5489350\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/9b5e1b93c83ee5fc9f5d7bd2d45b421bd87774a2\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"}]}}"
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}


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