cve-2024-36977
Vulnerability from cvelistv5
Published
2024-06-18 19:27
Modified
2024-08-02 03:43
Severity
Summary
usb: dwc3: Wait unconditionally after issuing EndXfer command
References
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"value": "In the Linux kernel, the following vulnerability has been resolved:\n\nusb: dwc3: Wait unconditionally after issuing EndXfer command\n\nCurrently all controller IP/revisions except DWC3_usb3 \u003e= 310a\nwait 1ms unconditionally for ENDXFER completion when IOC is not\nset. This is because DWC_usb3 controller revisions \u003e= 3.10a\nsupports GUCTL2[14: Rst_actbitlater] bit which allows polling\nCMDACT bit to know whether ENDXFER command is completed.\n\nConsider a case where an IN request was queued, and parallelly\nsoft_disconnect was called (due to ffs_epfile_release). This\neventually calls stop_active_transfer with IOC cleared, hence\nsend_gadget_ep_cmd() skips waiting for CMDACT cleared during\nEndXfer. For DWC3 controllers with revisions \u003e= 310a, we don\u0027t\nforcefully wait for 1ms either, and we proceed by unmapping the\nrequests. If ENDXFER didn\u0027t complete by this time, it leads to\nSMMU faults since the controller would still be accessing those\nrequests.\n\nFix this by ensuring ENDXFER completion by adding 1ms delay in\n__dwc3_stop_active_transfer() unconditionally."
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"title": "usb: dwc3: Wait unconditionally after issuing EndXfer command",
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"cveId": "CVE-2024-36977",
"datePublished": "2024-06-18T19:27:58.319Z",
"dateReserved": "2024-05-30T15:25:07.082Z",
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"nvd": "{\"cve\":{\"id\":\"CVE-2024-36977\",\"sourceIdentifier\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\",\"published\":\"2024-06-18T20:15:13.517\",\"lastModified\":\"2024-06-20T12:44:01.637\",\"vulnStatus\":\"Awaiting Analysis\",\"descriptions\":[{\"lang\":\"en\",\"value\":\"In the Linux kernel, the following vulnerability has been resolved:\\n\\nusb: dwc3: Wait unconditionally after issuing EndXfer command\\n\\nCurrently all controller IP/revisions except DWC3_usb3 \u003e= 310a\\nwait 1ms unconditionally for ENDXFER completion when IOC is not\\nset. This is because DWC_usb3 controller revisions \u003e= 3.10a\\nsupports GUCTL2[14: Rst_actbitlater] bit which allows polling\\nCMDACT bit to know whether ENDXFER command is completed.\\n\\nConsider a case where an IN request was queued, and parallelly\\nsoft_disconnect was called (due to ffs_epfile_release). This\\neventually calls stop_active_transfer with IOC cleared, hence\\nsend_gadget_ep_cmd() skips waiting for CMDACT cleared during\\nEndXfer. For DWC3 controllers with revisions \u003e= 310a, we don\u0027t\\nforcefully wait for 1ms either, and we proceed by unmapping the\\nrequests. If ENDXFER didn\u0027t complete by this time, it leads to\\nSMMU faults since the controller would still be accessing those\\nrequests.\\n\\nFix this by ensuring ENDXFER completion by adding 1ms delay in\\n__dwc3_stop_active_transfer() unconditionally.\"},{\"lang\":\"es\",\"value\":\"En el kernel de Linux, se resolvi\u00f3 la siguiente vulnerabilidad: usb: dwc3: Espere incondicionalmente despu\u00e9s de emitir el comando EndXfer Actualmente, todas las IP/revisiones del controlador excepto DWC3_usb3 \u0026gt;= 310a esperan 1 ms incondicionalmente para que ENDXFER se complete cuando el IOC no est\u00e1 configurado. Esto se debe a que las revisiones del controlador DWC_usb3 \u0026gt;= 3.10a admiten el bit GUCTL2[14: Rst_actbitlater] que permite sondear el bit CMDACT para saber si se complet\u00f3 el comando ENDXFER. Considere un caso en el que se puso en cola una solicitud IN y, en paralelo, se llam\u00f3 a soft_disconnect (debido a ffs_epfile_release). Esto eventualmente llama a stop_active_transfer con el IOC borrado, por lo tanto, send_gadget_ep_cmd() omite la espera de que CMDACT se borre durante EndXfer. Para los controladores DWC3 con revisiones \u0026gt;= 310a, tampoco esperamos forzosamente 1 ms y procedemos a desasignar las solicitudes. Si ENDXFER no se complet\u00f3 en este momento, se producir\u00e1n fallas de SMMU ya que el controlador a\u00fan estar\u00eda accediendo a esas solicitudes. Solucione este problema asegurando la finalizaci\u00f3n de ENDXFER agregando un retraso de 1 ms en __dwc3_stop_active_transfer() incondicionalmente.\"}],\"metrics\":{},\"references\":[{\"url\":\"https://git.kernel.org/stable/c/1ba145f05b5c8f0b1a947a0633b5edff5dd1f1c5\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/1d26ba0944d398f88aaf997bda3544646cf21945\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/341eb08dbca9eae05308c442fbfab1813a44c97a\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/4a387e032909c6dc2b479452c5bbe9a252057925\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/ec96bcf5f96a7a5c556b0e881ac3e5c3924d542c\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"}]}}"
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