ghsa-j637-3f25-pg9w
Vulnerability from github
In the Linux kernel, the following vulnerability has been resolved:
i2c: qcom-geni: Correct I2C TRE sequence
For i2c read operation in GSI mode, we are getting timeout due to malformed TRE basically incorrect TRE sequence in gpi(drivers/dma/qcom/gpi.c) driver.
I2C driver has geni_i2c_gpi(I2C_WRITE) function which generates GO TRE and geni_i2c_gpi(I2C_READ)generates DMA TRE. Hence to generate GO TRE before DMA TRE, we should move geni_i2c_gpi(I2C_WRITE) before geni_i2c_gpi(I2C_READ) inside the I2C GSI mode transfer function i.e. geni_i2c_gpi_xfer().
TRE stands for Transfer Ring Element - which is basically an element with size of 4 words. It contains all information like slave address, clk divider, dma address value data size etc).
Mainly we have 3 TREs(Config, GO and DMA tre). - CONFIG TRE : consists of internal register configuration which is required before start of the transfer. - DMA TRE : contains DDR/Memory address, called as DMA descriptor. - GO TRE : contains Transfer directions, slave ID, Delay flags, Length of the transfer.
I2c driver calls GPI driver API to config each TRE depending on the protocol.
For read operation tre sequence will be as below which is not aligned to hardware programming guide.
- CONFIG tre
- DMA tre
- GO tre
As per Qualcomm's internal Hardware Programming Guide, we should configure TREs in below sequence for any RX only transfer.
- CONFIG tre
- GO tre
- DMA tre
{
"affected": [],
"aliases": [
"CVE-2024-26827"
],
"database_specific": {
"cwe_ids": [],
"github_reviewed": false,
"github_reviewed_at": null,
"nvd_published_at": "2024-04-17T10:15:09Z",
"severity": null
},
"details": "In the Linux kernel, the following vulnerability has been resolved:\n\ni2c: qcom-geni: Correct I2C TRE sequence\n\nFor i2c read operation in GSI mode, we are getting timeout\ndue to malformed TRE basically incorrect TRE sequence\nin gpi(drivers/dma/qcom/gpi.c) driver.\n\nI2C driver has geni_i2c_gpi(I2C_WRITE) function which generates GO TRE and\ngeni_i2c_gpi(I2C_READ)generates DMA TRE. Hence to generate GO TRE before\nDMA TRE, we should move geni_i2c_gpi(I2C_WRITE) before\ngeni_i2c_gpi(I2C_READ) inside the I2C GSI mode transfer function\ni.e. geni_i2c_gpi_xfer().\n\nTRE stands for Transfer Ring Element - which is basically an element with\nsize of 4 words. It contains all information like slave address,\nclk divider, dma address value data size etc).\n\nMainly we have 3 TREs(Config, GO and DMA tre).\n- CONFIG TRE : consists of internal register configuration which is\n required before start of the transfer.\n- DMA TRE : contains DDR/Memory address, called as DMA descriptor.\n- GO TRE : contains Transfer directions, slave ID, Delay flags, Length\n of the transfer.\n\nI2c driver calls GPI driver API to config each TRE depending on the\nprotocol.\n\nFor read operation tre sequence will be as below which is not aligned\nto hardware programming guide.\n\n- CONFIG tre\n- DMA tre\n- GO tre\n\nAs per Qualcomm\u0027s internal Hardware Programming Guide, we should configure\nTREs in below sequence for any RX only transfer.\n\n- CONFIG tre\n- GO tre\n- DMA tre",
"id": "GHSA-j637-3f25-pg9w",
"modified": "2024-04-17T12:32:03Z",
"published": "2024-04-17T12:32:03Z",
"references": [
{
"type": "ADVISORY",
"url": "https://nvd.nist.gov/vuln/detail/CVE-2024-26827"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/0589dff4fbf4a7b88a909a34ecfa7b5d3daf51f5"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/083870b029c06da6a9a49340dd78637eec35a1d4"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/83ef106fa732aea8558253641cd98e8a895604d7"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/9318483e99f242ec4059e2fa20887e1d28efd5ae"
}
],
"schema_version": "1.4.0",
"severity": []
}