CVE-2011-5174 (GCVE-0-2011-5174)

Vulnerability from cvelistv5 – Published: 2012-09-15 17:00 – Updated: 2024-08-07 00:30
VLAI
Summary
Buffer overflow in Intel Trusted Execution Technology (TXT) SINIT Authenticated Code Modules (ACM) in Intel Q67 Express, C202, C204, C206 Chipsets, and Mobile Intel QM67, and QS67 Chipset before 2nd_gen_i5_i7_SINIT_51.BIN Express; Intel Q57, 3450 Chipsets and Mobile Intel QM57 and QS57 Express Chipset before i5_i7_DUAL_SINIT_51.BIN and i7_QUAD_SINIT_51.BIN; Mobile Intel GM45, GS45, and PM45 Express Chipset before GM45_GS45_PM45_SINIT_51.BIN; Intel Q35 Express Chipsets before Q35_SINIT_51.BIN; and Intel 5520, 5500, X58, and 7500 Chipsets before SINIT ACM 1.1 allows local users to bypass the Trusted Execution Technology protection mechanism and perform other unspecified SINIT ACM functions via unspecified vectors.
Severity
No CVSS data available.
CWE
  • n/a
Assigner
mitre CNA under the mitre root
CNA scorecard E 29/100 over 2159 records in the last 180 days details
References
URL Tags
http://secunia.com/advisories/47096 third-party-advisoryx_refsource_SECUNIA
http://osvdb.org/77554 vdb-entryx_refsource_OSVDB
http://theinvisiblethings.blogspot.com/2011/12/ex… x_refsource_MISC
https://exchange.xforce.ibmcloud.com/vulnerabilit… vdb-entryx_refsource_XF
http://security-center.intel.com/advisory.aspx?in… x_refsource_CONFIRM
Date Public
2011-12-05 00:00
Show details on NVD website
To clipboard 

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      "lastModified": "2024-11-21T01:33:49.023",
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            "value": "Buffer overflow in Intel Trusted Execution Technology (TXT) SINIT Authenticated Code Modules (ACM) in Intel Q67 Express, C202, C204, C206 Chipsets, and Mobile Intel QM67, and QS67 Chipset before 2nd_gen_i5_i7_SINIT_51.BIN Express; Intel Q57, 3450 Chipsets and Mobile Intel QM57 and QS57 Express Chipset before i5_i7_DUAL_SINIT_51.BIN and i7_QUAD_SINIT_51.BIN; Mobile Intel GM45, GS45, and PM45 Express Chipset before GM45_GS45_PM45_SINIT_51.BIN; Intel Q35 Express Chipsets before Q35_SINIT_51.BIN; and Intel 5520, 5500, X58, and 7500 Chipsets before SINIT ACM 1.1 allows local users to bypass the Trusted Execution Technology protection mechanism and perform other unspecified SINIT ACM functions via unspecified vectors."
          },
          {
            "lang": "es",
            "value": "Desbordamiento de b\u00fafer en Intel Trusted Execution Technology (TXT) SINIT Authenticated Code Modules (ACM) en Intel Q67 Express, C202, C204, C206 Chipsets, y Mobile Intel QM67, y QS67 Chipset anterior a 2nd_gen_i5_i7_SINIT_51.BIN Express; Intel Q57, 3450 Chipsets y Mobile Intel QM57 y QS57 Express Chipset anterior a i5_i7_DUAL_SINIT_51.BIN y i7_QUAD_SINIT_51.BIN; Mobile Intel GM45, GS45, y PM45 Express Chipset anterior a GM45_GS45_PM45_SINIT_51.BIN; Intel Q35 Express Chipsets anterior a Q35_SINIT_51.BIN; y Intel 5520, 5500, X58, y 7500 Chipsets anterior a SINIT ACM 1.1 permite a usaurios locales saltarse el mecanismo de protecci\u00f3n (Trusted Execution Technology)y llevar a cabo otras funciones (SNIT ACM) a trav\u00e9s de vectores no especificados."
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        ],
        "id": "CVE-2011-5174",
        "lastModified": "2026-04-29T01:13:23.040",
        "metrics": {
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              "acInsufInfo": false,
              "baseSeverity": "HIGH",
              "cvssData": {
                "accessComplexity": "LOW",
                "accessVector": "LOCAL",
                "authentication": "NONE",
                "availabilityImpact": "COMPLETE",
                "baseScore": 7.2,
                "confidentialityImpact": "COMPLETE",
                "integrityImpact": "COMPLETE",
                "vectorString": "AV:L/AC:L/Au:N/C:C/I:C/A:C",
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            "source": "cve@mitre.org",
            "url": "http://osvdb.org/77554"
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          {
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            "tags": [
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          {
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            "url": "http://security-center.intel.com/advisory.aspx?intelid=INTEL-SA-00030\u0026languageid=en-fr"
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          {
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                "value": "CWE-119"
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    },
    "suse_vex": {
      "aggregate_severity": "moderate",
      "current_release_date": "2026-08-01T23:42:29Z",
      "cve": "CVE-2011-5174",
      "id": "CVE-2011-5174",
      "initial_release_date": "2023-02-15T05:49:32Z",
      "product_status:known_not_affected": "13",
      "product_status:recommended": "3",
      "source": "SUSE CSAF VEX",
      "status": "interim",
      "title": "SUSE CVE CVE-2011-5174",
      "url": "https://ftp.suse.com/pub/projects/security/csaf-vex/cve-2011-5174.json",
      "version": "5"
    }
  }
}



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Sightings

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Nomenclature

  • Seen: The vulnerability was mentioned, discussed, or observed by the user.
  • Confirmed: The vulnerability has been validated from an analyst's perspective.
  • Published Proof of Concept: A public proof of concept is available for this vulnerability.
  • Exploited: The vulnerability was observed as exploited by the user who reported the sighting.
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  • Not confirmed: The user expressed doubt about the validity of the vulnerability.
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Vulnerability timeline

Sightings and recorded dates, grouped by day · UTC

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How durations are calculated

Following the VTEM framework (Black Hat USA 2015), time to patch starts when the vendor or a coordinator was informed, total time to patch at discovery, and disclosure to patch at public disclosure; vendor response time runs from the report to its acknowledgement. Time to exploit and time unpatched start at the earliest discovery or report, falling back to public disclosure. Unpatched time ends at the first recorded patch, or the calculation time when no patch is recorded. Exploitation to patch shows the interval between those two events; a published proof of concept is a public exploit, not exploitation.

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