CVE-2023-52484
Vulnerability from cvelistv5
Published
2024-02-29 05:43
Modified
2024-11-04 14:47
Severity ?
Summary
iommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range
References
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/3283a1bce9bbc978059f790b84f3c10c32492429
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/d5afb4b47e13161b3f33904d45110f9e6463bad6
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/f5a604757aa8e37ea9c7011dc9da54fa1b30f29b
416baaa9-dc9f-4396-8d5f-8c081fb06d67https://git.kernel.org/stable/c/f90f4c562003ac3d3b135c5a40a5383313f27264
Impacted products
LinuxLinux
LinuxLinux
Show details on NVD website

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          "programFiles": [
            "drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c"
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          "repo": "https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git",
          "vendor": "Linux",
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          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\niommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range\n\nWhen running an SVA case, the following soft lockup is triggered:\n--------------------------------------------------------------------\nwatchdog: BUG: soft lockup - CPU#244 stuck for 26s!\npstate: 83400009 (Nzcv daif +PAN -UAO +TCO +DIT -SSBS BTYPE=--)\npc : arm_smmu_cmdq_issue_cmdlist+0x178/0xa50\nlr : arm_smmu_cmdq_issue_cmdlist+0x150/0xa50\nsp : ffff8000d83ef290\nx29: ffff8000d83ef290 x28: 000000003b9aca00 x27: 0000000000000000\nx26: ffff8000d83ef3c0 x25: da86c0812194a0e8 x24: 0000000000000000\nx23: 0000000000000040 x22: ffff8000d83ef340 x21: ffff0000c63980c0\nx20: 0000000000000001 x19: ffff0000c6398080 x18: 0000000000000000\nx17: 0000000000000000 x16: 0000000000000000 x15: ffff3000b4a3bbb0\nx14: ffff3000b4a30888 x13: ffff3000b4a3cf60 x12: 0000000000000000\nx11: 0000000000000000 x10: 0000000000000000 x9 : ffffc08120e4d6bc\nx8 : 0000000000000000 x7 : 0000000000000000 x6 : 0000000000048cfa\nx5 : 0000000000000000 x4 : 0000000000000001 x3 : 000000000000000a\nx2 : 0000000080000000 x1 : 0000000000000000 x0 : 0000000000000001\nCall trace:\n arm_smmu_cmdq_issue_cmdlist+0x178/0xa50\n __arm_smmu_tlb_inv_range+0x118/0x254\n arm_smmu_tlb_inv_range_asid+0x6c/0x130\n arm_smmu_mm_invalidate_range+0xa0/0xa4\n __mmu_notifier_invalidate_range_end+0x88/0x120\n unmap_vmas+0x194/0x1e0\n unmap_region+0xb4/0x144\n do_mas_align_munmap+0x290/0x490\n do_mas_munmap+0xbc/0x124\n __vm_munmap+0xa8/0x19c\n __arm64_sys_munmap+0x28/0x50\n invoke_syscall+0x78/0x11c\n el0_svc_common.constprop.0+0x58/0x1c0\n do_el0_svc+0x34/0x60\n el0_svc+0x2c/0xd4\n el0t_64_sync_handler+0x114/0x140\n el0t_64_sync+0x1a4/0x1a8\n--------------------------------------------------------------------\n\nNote that since 6.6-rc1 the arm_smmu_mm_invalidate_range above is renamed\nto \"arm_smmu_mm_arch_invalidate_secondary_tlbs\", yet the problem remains.\n\nThe commit 06ff87bae8d3 (\"arm64: mm: remove unused functions and variable\nprotoypes\") fixed a similar lockup on the CPU MMU side. Yet, it can occur\nto SMMU too, since arm_smmu_mm_arch_invalidate_secondary_tlbs() is called\ntypically next to MMU tlb flush function, e.g.\n\ttlb_flush_mmu_tlbonly {\n\t\ttlb_flush {\n\t\t\t__flush_tlb_range {\n\t\t\t\t// check MAX_TLBI_OPS\n\t\t\t}\n\t\t}\n\t\tmmu_notifier_arch_invalidate_secondary_tlbs {\n\t\t\tarm_smmu_mm_arch_invalidate_secondary_tlbs {\n\t\t\t\t// does not check MAX_TLBI_OPS\n\t\t\t}\n\t\t}\n\t}\n\nClone a CMDQ_MAX_TLBI_OPS from the MAX_TLBI_OPS in tlbflush.h, since in an\nSVA case SMMU uses the CPU page table, so it makes sense to align with the\ntlbflush code. Then, replace per-page TLBI commands with a single per-asid\nTLBI command, if the request size hits this threshold."
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        "dateUpdated": "2024-11-04T14:47:45.165Z",
        "orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "shortName": "Linux"
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      "title": "iommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range",
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    "assignerOrgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
    "assignerShortName": "Linux",
    "cveId": "CVE-2023-52484",
    "datePublished": "2024-02-29T05:43:14.502Z",
    "dateReserved": "2024-02-20T12:30:33.301Z",
    "dateUpdated": "2024-11-04T14:47:45.165Z",
    "state": "PUBLISHED"
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    "nvd": "{\"cve\":{\"id\":\"CVE-2023-52484\",\"sourceIdentifier\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\",\"published\":\"2024-02-29T06:15:46.190\",\"lastModified\":\"2024-02-29T13:49:29.390\",\"vulnStatus\":\"Awaiting Analysis\",\"descriptions\":[{\"lang\":\"en\",\"value\":\"In the Linux kernel, the following vulnerability has been resolved:\\n\\niommu/arm-smmu-v3: Fix soft lockup triggered by arm_smmu_mm_invalidate_range\\n\\nWhen running an SVA case, the following soft lockup is triggered:\\n--------------------------------------------------------------------\\nwatchdog: BUG: soft lockup - CPU#244 stuck for 26s!\\npstate: 83400009 (Nzcv daif +PAN -UAO +TCO +DIT -SSBS BTYPE=--)\\npc : arm_smmu_cmdq_issue_cmdlist+0x178/0xa50\\nlr : arm_smmu_cmdq_issue_cmdlist+0x150/0xa50\\nsp : ffff8000d83ef290\\nx29: ffff8000d83ef290 x28: 000000003b9aca00 x27: 0000000000000000\\nx26: ffff8000d83ef3c0 x25: da86c0812194a0e8 x24: 0000000000000000\\nx23: 0000000000000040 x22: ffff8000d83ef340 x21: ffff0000c63980c0\\nx20: 0000000000000001 x19: ffff0000c6398080 x18: 0000000000000000\\nx17: 0000000000000000 x16: 0000000000000000 x15: ffff3000b4a3bbb0\\nx14: ffff3000b4a30888 x13: ffff3000b4a3cf60 x12: 0000000000000000\\nx11: 0000000000000000 x10: 0000000000000000 x9 : ffffc08120e4d6bc\\nx8 : 0000000000000000 x7 : 0000000000000000 x6 : 0000000000048cfa\\nx5 : 0000000000000000 x4 : 0000000000000001 x3 : 000000000000000a\\nx2 : 0000000080000000 x1 : 0000000000000000 x0 : 0000000000000001\\nCall trace:\\n arm_smmu_cmdq_issue_cmdlist+0x178/0xa50\\n __arm_smmu_tlb_inv_range+0x118/0x254\\n arm_smmu_tlb_inv_range_asid+0x6c/0x130\\n arm_smmu_mm_invalidate_range+0xa0/0xa4\\n __mmu_notifier_invalidate_range_end+0x88/0x120\\n unmap_vmas+0x194/0x1e0\\n unmap_region+0xb4/0x144\\n do_mas_align_munmap+0x290/0x490\\n do_mas_munmap+0xbc/0x124\\n __vm_munmap+0xa8/0x19c\\n __arm64_sys_munmap+0x28/0x50\\n invoke_syscall+0x78/0x11c\\n el0_svc_common.constprop.0+0x58/0x1c0\\n do_el0_svc+0x34/0x60\\n el0_svc+0x2c/0xd4\\n el0t_64_sync_handler+0x114/0x140\\n el0t_64_sync+0x1a4/0x1a8\\n--------------------------------------------------------------------\\n\\nNote that since 6.6-rc1 the arm_smmu_mm_invalidate_range above is renamed\\nto \\\"arm_smmu_mm_arch_invalidate_secondary_tlbs\\\", yet the problem remains.\\n\\nThe commit 06ff87bae8d3 (\\\"arm64: mm: remove unused functions and variable\\nprotoypes\\\") fixed a similar lockup on the CPU MMU side. Yet, it can occur\\nto SMMU too, since arm_smmu_mm_arch_invalidate_secondary_tlbs() is called\\ntypically next to MMU tlb flush function, e.g.\\n\\ttlb_flush_mmu_tlbonly {\\n\\t\\ttlb_flush {\\n\\t\\t\\t__flush_tlb_range {\\n\\t\\t\\t\\t// check MAX_TLBI_OPS\\n\\t\\t\\t}\\n\\t\\t}\\n\\t\\tmmu_notifier_arch_invalidate_secondary_tlbs {\\n\\t\\t\\tarm_smmu_mm_arch_invalidate_secondary_tlbs {\\n\\t\\t\\t\\t// does not check MAX_TLBI_OPS\\n\\t\\t\\t}\\n\\t\\t}\\n\\t}\\n\\nClone a CMDQ_MAX_TLBI_OPS from the MAX_TLBI_OPS in tlbflush.h, since in an\\nSVA case SMMU uses the CPU page table, so it makes sense to align with the\\ntlbflush code. Then, replace per-page TLBI commands with a single per-asid\\nTLBI command, if the request size hits this threshold.\"},{\"lang\":\"es\",\"value\":\"En el kernel de Linux, se resolvi\u00f3 la siguiente vulnerabilidad: iommu/arm-smmu-v3: Correcci\u00f3n del bloqueo suave activado por arm_smmu_mm_invalidate_range Cuando se ejecuta un caso SVA, se activa el siguiente bloqueo suave: ----------- -------------------------------------------------- ------- perro guardi\u00e1n: ERROR: bloqueo suave - \u00a1CPU#244 bloqueada durante 26 segundos! pstate: 83400009 (Nzcv daif +PAN -UAO +TCO +DIT -SSBS BTYPE=--) pc: arm_smmu_cmdq_issue_cmdlist+0x178/0xa50 lr: arm_smmu_cmdq_issue_cmdlist+0x150/0xa50 sp: ffff8000d83ef290 x29: ffff8000 d83ef290 x28: 000000003b9aca00 x27: 0000000000000000 x26: ffff8000d83ef3c0 x25: da86c0812194a0e8 x24: 0000000000000000 x23: 0000000000000040 x22: ffff8000d83ef340 x21: ffff0000c63980c0 x20: 0000000000000001 x19: ffff0000c6398080 x18: 0000000000000000 x17: 0000000000000000 x16: 0000000000000000 x15: ffff3000b4a3bbb0 x14: ffff3000b4a30888 x13: ffff3000 b4a3cf60 x12: 0000000000000000 x11: 0000000000000000 x10: 0000000000000000 x9: ffffc08120e4d6bc x8: 0000000000000000 x7: 0000000000000000 x6: 0000000000048cfa x5: 00000000000000000 x4: 0000000000000001 x3: 0000000 00000000a x2: 0000000080000000 x1: 0000000000000000 x0: 0000000000000001 Rastreo de llamadas: arm_smmu_cmdq_issue_cmdlist+0x178/0xa50 __arm_smmu_tlb_inv_range+0x118/0x254 arm_smmu_tlb_inv_range_asid+0x6c/0x130 arm_smmu_mm_invalidate_range+0xa0/ 0xa4 __mmu_notifier_invalidate_range_end+0x88/0x120 unmap_vmas+0x194/0x1e0 unmap_region+0xb4/0x144 do_mas_align_munmap+0x290/0x490 do_mas_munmap+0xbc/0x124 __vm_munmap+0xa8/0x19c __arm64_sy s_munmap+0x28/0x50 invoke_syscall+0x78/0x11c el0_svc_common.constprop.0+0x58/0x1c0 do_el0_svc+0x34/0x60 el0_svc+0x2c/0xd4 el0t_64_sync_handler+0x114/0x140 el0t_64_sync+0x1a4/0x1a8 ------------------------------ -------------------------------------- Tenga en cuenta que desde 6.6-rc1 el nombre de arm_smmu_mm_invalidate_range anterior se cambia a \\\"arm_smmu_mm_arch_invalidate_secondary_tlbs\\\", pero el problema persiste. El commit 06ff87bae8d3 (\\\"arm64: mm: eliminar funciones no utilizadas y prototipos variables\\\") solucion\u00f3 un bloqueo similar en el lado de la MMU de la CPU. Sin embargo, tambi\u00e9n le puede ocurrir a SMMU, ya que arm_smmu_mm_arch_invalidate_ secondary_tlbs() se llama normalmente junto a la funci\u00f3n de descarga tlb de MMU, por ejemplo, tlb_flush_mmu_tlbonly { tlb_flush { __flush_tlb_range { // comprobar MAX_TLBI_OPS } } mmu_notifier_arch_invalidate_ secondary_tlbs { arm_smmu_mm_arch_invalidate_segundo ary_tlbs { // no marca MAX_TLBI_OPS } } } Clonar un CMDQ_MAX_TLBI_OPS de MAX_TLBI_OPS en tlbflush.h, ya que en un caso SVA SMMU usa la tabla de p\u00e1ginas de la CPU, por lo que tiene sentido alinearse con el c\u00f3digo tlbflush. Luego, reemplace los comandos TLBI por p\u00e1gina con un \u00fanico comando TLBI por asid, si el tama\u00f1o de la solicitud alcanza este umbral.\"}],\"metrics\":{},\"references\":[{\"url\":\"https://git.kernel.org/stable/c/3283a1bce9bbc978059f790b84f3c10c32492429\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/d5afb4b47e13161b3f33904d45110f9e6463bad6\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/f5a604757aa8e37ea9c7011dc9da54fa1b30f29b\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/f90f4c562003ac3d3b135c5a40a5383313f27264\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"}]}}"
  }
}


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