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CVE-2026-29643 (GCVE-0-2026-29643)

Vulnerability from cvelistv5 – Published: 2026-04-20 00:00 – Updated: 2026-04-21 19:50
VLAI
Summary
XiangShan (Open-source high-performance RISC-V processor) commit edb1dfaf7d290ae99724594507dc46c2c2125384 (2024-11-28) contains an improper exceptional-condition handling flaw in its CSR subsystem (NewCSR). On affected versions, certain sequences of CSR operations targeting non-existent/custom CSR addresses may trigger an illegal-instruction exception but fail to reliably transfer control to the configured trap handler (mtvec), causing control-flow disruption and potentially leaving the core in a hung or unrecoverable state. This can be exploited by a local attacker able to execute code on the processor to cause a denial of service and potentially inconsistent architectural state.
SSVC
Exploitation: poc Automatable: no Technical Impact: partial
CISA Coordinator · CISA-ADP (v2.0.3)
Decision recorded 2026-04-21 19:14 UTC
CWE
  • n/a
  • CWE-703 - Improper Check or Handling of Exceptional Conditions
Show details on NVD website

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