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CVE-2026-74276 (GCVE-0-2026-74276)

Vulnerability from cvelistv5 – Published: 2026-08-15 05:57 – Updated: 2026-08-17 05:16
VLAI
Title
spi: xilinx: use FIFO occupancy register to determine buffer size
Summary
In the Linux kernel, the following vulnerability has been resolved: spi: xilinx: use FIFO occupancy register to determine buffer size The method the driver uses to determine the size of the FIFO has a problem. What it currently does is this: It stops the SPI hardware and writes to the TX FIFO register until TX FIFO FULL asserts in the status register. But the hardware does not only have the FIFO, it also has a shift register which can hold a byte. This can be seen, when writing a byte to the FIFO (while the SPI hardware is stopped,) the TX FIFO EMPTY is still empty. So, if we have a FIFO size of 16 for example, the current method returns a 17. This is a problem, at least when using the driver in irq mode. The same size determined for the TX FIFO is also assumed for the RX FIFO. When a SPI transaction wants to write the amount of the FIFO size or more bytes, the following happens, for example with 16 bytes FIFO size: The driver stops the SPI hardware and writes 17 bytes to the TX FIFO and starts the SPI hardware and goes sleep. The hardware then shifts out 17 bytes (FIFO + shift register) and simultaneously reads bytes into the RX FIFO, but it only has 16 places, so it looses one byte. Then TX FIFO empty asserts, wakes the driver again, which has a fast path and reads 16 bytes from the RX FIFO, but before reading the last 17th byte (which is lost) it does this: sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET); if (!(sr & XSPI_SR_RX_EMPTY_MASK)) { xilinx_spi_rx(xspi); rx_words--; } It reads the status register and checks if the RX FIFO is not empty. But it is empty in our case. So this check spins in a while loop forever locking the driver. This patch fixes the logic to determine the FIFO size.
Severity
No CVSS data available.
Assigner
References
Impacted products
Vendor Product Version CPE status
Linux Linux Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < 4ee65558a7fda463222f5edc631b6d7862218725 (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < e98f589d54068dfcc7da42d9b730e47b84e2991a (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < 1fc6a6c0cc7796b0c1cf4eec3f0720f422f09273 (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < dfab0d4698a642bab9b895e2e6d240838cfe2cc6 (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < d7ccd8736b67550eca746ed7fa39a36016ff114b (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < 1c9246a199e19b2fd36e94feed60e55f27103a4f (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < d1944b71c18e7494756bff1a6f80c25be99eaecb (git)
Affected: 4c9a761402d780b86b9b068aba4ef8e29ed15e99 , < 47f3b5365536e8c38f264824ab15fdb74454e066 (git)
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Linux Linux Affected: 4.0
Unaffected: 0 , < 4.0 (semver)
Unaffected: 5.10.261 , ≤ 5.10.* (semver)
Unaffected: 5.15.212 , ≤ 5.15.* (semver)
Unaffected: 6.1.178 , ≤ 6.1.* (semver)
Unaffected: 6.6.145 , ≤ 6.6.* (semver)
Unaffected: 6.12.97 , ≤ 6.12.* (semver)
Unaffected: 6.18.40 , ≤ 6.18.* (semver)
Unaffected: 7.1.5 , ≤ 7.1.* (semver)
Unaffected: 7.2 , ≤ * (original_commit_for_fix)
guessed Create a notification for this product.
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                  "versionStartIncluding": "4.0",
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      "descriptions": [
        {
          "lang": "en",
          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nspi: xilinx: use FIFO occupancy register to determine buffer size\n\nThe method the driver uses to determine the size of the FIFO has a\nproblem. What it currently does is this:\nIt stops the SPI hardware and writes to the TX FIFO register until TX\nFIFO FULL asserts in the status register. But the hardware does not only\nhave the FIFO, it also has a shift register which can hold a byte. This\ncan be seen, when writing a byte to the FIFO (while the SPI hardware is\nstopped,) the TX FIFO EMPTY is still empty. So, if we have a FIFO size\nof 16 for example, the current method returns a 17.\nThis is a problem, at least when using the driver in irq mode. The same\nsize determined for the TX FIFO is also assumed for the RX FIFO. When a\nSPI transaction wants to write the amount of the FIFO size or more\nbytes, the following happens, for example with 16 bytes FIFO size:\nThe driver stops the SPI hardware and writes 17 bytes to the TX FIFO and\nstarts the SPI hardware and goes sleep.\nThe hardware then shifts out 17 bytes (FIFO + shift register) and\nsimultaneously reads bytes into the RX FIFO, but it only has 16 places,\nso it looses one byte. Then TX FIFO empty asserts, wakes the driver\nagain, which has a fast path and reads 16 bytes from the RX FIFO, but\nbefore reading the last 17th byte (which is lost) it does this:\n\n\tsr = xspi-\u003eread_fn(xspi-\u003eregs + XSPI_SR_OFFSET);\n\tif (!(sr \u0026 XSPI_SR_RX_EMPTY_MASK)) {\n\t\txilinx_spi_rx(xspi);\n\t\trx_words--;\n\t}\n\nIt reads the status register and checks if the RX FIFO is not empty.\nBut it is empty in our case. So this check spins in a while loop\nforever locking the driver.\n\nThis patch fixes the logic to determine the FIFO size."
        }
      ],
      "providerMetadata": {
        "dateUpdated": "2026-08-17T05:16:20.426Z",
        "orgId": "416baaa9-dc9f-4396-8d5f-8c081fb06d67",
        "shortName": "Linux"
      },
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          "url": "https://git.kernel.org/stable/c/e98f589d54068dfcc7da42d9b730e47b84e2991a"
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        },
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          "url": "https://git.kernel.org/stable/c/d7ccd8736b67550eca746ed7fa39a36016ff114b"
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        {
          "url": "https://git.kernel.org/stable/c/d1944b71c18e7494756bff1a6f80c25be99eaecb"
        },
        {
          "url": "https://git.kernel.org/stable/c/47f3b5365536e8c38f264824ab15fdb74454e066"
        }
      ],
      "title": "spi: xilinx: use FIFO occupancy register to determine buffer size",
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        "engine": "bippy-1.2.0"
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    "assignerShortName": "Linux",
    "cveId": "CVE-2026-74276",
    "datePublished": "2026-08-15T05:57:48.115Z",
    "dateReserved": "2026-08-15T05:44:03.880Z",
    "dateUpdated": "2026-08-17T05:16:20.426Z",
    "state": "PUBLISHED"
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So, if we have a FIFO size\\nof 16 for example, the current method returns a 17.\\nThis is a problem, at least when using the driver in irq mode. The same\\nsize determined for the TX FIFO is also assumed for the RX FIFO. When a\\nSPI transaction wants to write the amount of the FIFO size or more\\nbytes, the following happens, for example with 16 bytes FIFO size:\\nThe driver stops the SPI hardware and writes 17 bytes to the TX FIFO and\\nstarts the SPI hardware and goes sleep.\\nThe hardware then shifts out 17 bytes (FIFO + shift register) and\\nsimultaneously reads bytes into the RX FIFO, but it only has 16 places,\\nso it looses one byte. Then TX FIFO empty asserts, wakes the driver\\nagain, which has a fast path and reads 16 bytes from the RX FIFO, but\\nbefore reading the last 17th byte (which is lost) it does this:\\n\\n\\tsr = xspi-\u003eread_fn(xspi-\u003eregs + XSPI_SR_OFFSET);\\n\\tif (!(sr \u0026 XSPI_SR_RX_EMPTY_MASK)) {\\n\\t\\txilinx_spi_rx(xspi);\\n\\t\\trx_words--;\\n\\t}\\n\\nIt reads the status register and checks if the RX FIFO is not empty.\\nBut it is empty in our case. So this check spins in a while loop\\nforever locking the driver.\\n\\nThis patch fixes the logic to determine the FIFO size.\"}],\"affected\":[{\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\",\"affectedData\":[{\"vendor\":\"Linux\",\"product\":\"Linux\",\"defaultStatus\":\"unaffected\",\"programFiles\":[\"drivers/spi/spi-xilinx.c\"],\"repo\":\"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git\",\"versions\":[{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"4ee65558a7fda463222f5edc631b6d7862218725\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"e98f589d54068dfcc7da42d9b730e47b84e2991a\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"1fc6a6c0cc7796b0c1cf4eec3f0720f422f09273\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"dfab0d4698a642bab9b895e2e6d240838cfe2cc6\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"d7ccd8736b67550eca746ed7fa39a36016ff114b\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"1c9246a199e19b2fd36e94feed60e55f27103a4f\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"d1944b71c18e7494756bff1a6f80c25be99eaecb\",\"versionType\":\"git\",\"status\":\"affected\"},{\"version\":\"4c9a761402d780b86b9b068aba4ef8e29ed15e99\",\"lessThan\":\"47f3b5365536e8c38f264824ab15fdb74454e066\",\"versionType\":\"git\",\"status\":\"affected\"}]},{\"vendor\":\"Linux\",\"product\":\"Linux\",\"defaultStatus\":\"affected\",\"programFiles\":[\"drivers/spi/spi-xilinx.c\"],\"repo\":\"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git\",\"versions\":[{\"version\":\"4.0\",\"status\":\"affected\"},{\"version\":\"0\",\"lessThan\":\"4.0\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"5.10.261\",\"lessThanOrEqual\":\"5.10.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"5.15.212\",\"lessThanOrEqual\":\"5.15.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"6.1.178\",\"lessThanOrEqual\":\"6.1.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"6.6.145\",\"lessThanOrEqual\":\"6.6.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"6.12.97\",\"lessThanOrEqual\":\"6.12.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"6.18.40\",\"lessThanOrEqual\":\"6.18.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"7.1.5\",\"lessThanOrEqual\":\"7.1.*\",\"versionType\":\"semver\",\"status\":\"unaffected\"},{\"version\":\"7.2\",\"lessThanOrEqual\":\"*\",\"versionType\":\"original_commit_for_fix\",\"status\":\"unaffected\"}]}]}],\"metrics\":{},\"references\":[{\"url\":\"https://git.kernel.org/stable/c/1c9246a199e19b2fd36e94feed60e55f27103a4f\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/1fc6a6c0cc7796b0c1cf4eec3f0720f422f09273\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/47f3b5365536e8c38f264824ab15fdb74454e066\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/4ee65558a7fda463222f5edc631b6d7862218725\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/d1944b71c18e7494756bff1a6f80c25be99eaecb\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/d7ccd8736b67550eca746ed7fa39a36016ff114b\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/dfab0d4698a642bab9b895e2e6d240838cfe2cc6\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"},{\"url\":\"https://git.kernel.org/stable/c/e98f589d54068dfcc7da42d9b730e47b84e2991a\",\"source\":\"416baaa9-dc9f-4396-8d5f-8c081fb06d67\"}]}}",
    "redhat_vex": {
      "aggregate_severity": "Moderate",
      "current_release_date": "2026-08-19T10:27:58+00:00",
      "cve": "CVE-2026-74276",
      "id": "CVE-2026-74276",
      "initial_release_date": "2026-08-15T00:00:00+00:00",
      "product_status:known_not_affected": "274",
      "source": "Red Hat CSAF VEX",
      "status": "final",
      "title": "kernel: spi: xilinx: use FIFO occupancy register to determine buffer size",
      "url": "https://security.access.redhat.com/data/csaf/v2/vex/2026/cve-2026-74276.json",
      "version": "3"
    }
  }
}



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Forecast uses a logistic model when the trend is rising, or an exponential decay model when the trend is falling. Fitted via linearized least squares.

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  • Confirmed: The vulnerability has been validated from an analyst's perspective.
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