GHSA-V3GV-J32H-QW62
Vulnerability from github – Published: 2026-08-28 09:31 – Updated: 2026-08-28 09:31In the Linux kernel, the following vulnerability has been resolved:
pinctrl: spacemit: fix NULL check in spacemit_pin_set_config
spacemit_pin_set_config() looks up the per-pin descriptor with spacemit_get_pin() then checks the wrong variable for failure:
const struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin);
...
if (!pin)
return -EINVAL;
reg = spacemit_pin_to_reg(pctrl, spin->pin);
pin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a valid pin, so rejecting it here drops the PAD config write for the first pin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as its first entry, so its drive-strength / bias configuration was silently ignored.
The intended guard is against spacemit_get_pin() returning NULL when the pin id isn't in the SoC's pin table. Check spin instead, which both restores PAD setup for pin 0 and prevents a NULL deref on spin->pin.
{
"affected": [],
"aliases": [
"CVE-2026-80648"
],
"database_specific": {
"cwe_ids": [],
"github_reviewed": false,
"github_reviewed_at": null,
"nvd_published_at": "2026-08-28T08:16:49Z",
"severity": null
},
"details": "In the Linux kernel, the following vulnerability has been resolved:\n\npinctrl: spacemit: fix NULL check in spacemit_pin_set_config\n\nspacemit_pin_set_config() looks up the per-pin descriptor with\nspacemit_get_pin() then checks the wrong variable for failure:\n\n\tconst struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin);\n\t...\n\tif (!pin)\n\t\treturn -EINVAL;\n\n\treg = spacemit_pin_to_reg(pctrl, spin-\u003epin);\n\npin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a\nvalid pin, so rejecting it here drops the PAD config write for the first\npin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as\nits first entry, so its drive-strength / bias configuration was silently\nignored.\n\nThe intended guard is against spacemit_get_pin() returning NULL when the\npin id isn\u0027t in the SoC\u0027s pin table. Check spin instead, which both\nrestores PAD setup for pin 0 and prevents a NULL deref on spin-\u003epin.",
"id": "GHSA-v3gv-j32h-qw62",
"modified": "2026-08-28T09:31:48Z",
"published": "2026-08-28T09:31:48Z",
"references": [
{
"type": "ADVISORY",
"url": "https://nvd.nist.gov/vuln/detail/CVE-2026-80648"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/09c816e5c4d3a8d6d6e4b7537433e5e98505d934"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/7a551951ebeb5b3f05bdb04a73d4593869c984c4"
},
{
"type": "WEB",
"url": "https://git.kernel.org/stable/c/d3b53f0eda26e442ff97016ad4a0724db8fd3781"
}
],
"schema_version": "1.4.0",
"severity": []
}
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