CVE-2026-23114 (GCVE-0-2026-23114)

Vulnerability from cvelistv5 – Published: 2026-02-14 15:09 – Updated: 2026-05-11 22:00
VLAI
Title
arm64/fpsimd: ptrace: Fix SVE writes on !SME systems
Summary
In the Linux kernel, the following vulnerability has been resolved: arm64/fpsimd: ptrace: Fix SVE writes on !SME systems When SVE is supported but SME is not supported, a ptrace write to the NT_ARM_SVE regset can place the tracee into an invalid state where (non-streaming) SVE register data is stored in FP_STATE_SVE format but TIF_SVE is clear. This can result in a later warning from fpsimd_restore_current_state(), e.g. WARNING: CPU: 0 PID: 7214 at arch/arm64/kernel/fpsimd.c:383 fpsimd_restore_current_state+0x50c/0x748 When this happens, fpsimd_restore_current_state() will set TIF_SVE, placing the task into the correct state. This occurs before any other check of TIF_SVE can possibly occur, as other checks of TIF_SVE only happen while the FPSIMD/SVE/SME state is live. Thus, aside from the warning, there is no functional issue. This bug was introduced during rework to error handling in commit: 9f8bf718f2923 ("arm64/fpsimd: ptrace: Gracefully handle errors") ... where the setting of TIF_SVE was moved into a block which is only executed when system_supports_sme() is true. Fix this by removing the system_supports_sme() check. This ensures that TIF_SVE is set for (SVE-formatted) writes to NT_ARM_SVE, at the cost of unconditionally manipulating the tracee's saved svcr value. The manipulation of svcr is benign and inexpensive, and we already do similar elsewhere (e.g. during signal handling), so I don't think it's worth guarding this with system_supports_sme() checks. Aside from the above, there is no functional change. The 'type' argument to sve_set_common() is only set to ARM64_VEC_SME (in ssve_set())) when system_supports_sme(), so the ARM64_VEC_SME case in the switch statement is still unreachable when !system_supports_sme(). When CONFIG_ARM64_SME=n, the only caller of sve_set_common() is sve_set(), and the compiler can constant-fold for the case where type is ARM64_VEC_SVE, removing the logic for other cases.
Severity
5.5 (Medium)
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
Assigner
References
Impacted products
Vendor Product Version
Linux Linux Affected: 9f8bf718f29230e38a048d08fc3063e316cd60c1 , < 4f39984176e7edcaba3432b6c649c6fe93bf2f80 (git)
Affected: 9f8bf718f29230e38a048d08fc3063e316cd60c1 , < 128a7494a9f15aad60cc6b7e3546bf481ac54a13 (git)
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Linux Linux Affected: 6.16
Unaffected: 0 , < 6.16 (semver)
Unaffected: 6.18.8 , ≤ 6.18.* (semver)
Unaffected: 6.19 , ≤ * (original_commit_for_fix)
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          "value": "In the Linux kernel, the following vulnerability has been resolved:\n\narm64/fpsimd: ptrace: Fix SVE writes on !SME systems\n\nWhen SVE is supported but SME is not supported, a ptrace write to the\nNT_ARM_SVE regset can place the tracee into an invalid state where\n(non-streaming) SVE register data is stored in FP_STATE_SVE format but\nTIF_SVE is clear. This can result in a later warning from\nfpsimd_restore_current_state(), e.g.\n\n  WARNING: CPU: 0 PID: 7214 at arch/arm64/kernel/fpsimd.c:383 fpsimd_restore_current_state+0x50c/0x748\n\nWhen this happens, fpsimd_restore_current_state() will set TIF_SVE,\nplacing the task into the correct state. This occurs before any other\ncheck of TIF_SVE can possibly occur, as other checks of TIF_SVE only\nhappen while the FPSIMD/SVE/SME state is live. Thus, aside from the\nwarning, there is no functional issue.\n\nThis bug was introduced during rework to error handling in commit:\n\n  9f8bf718f2923 (\"arm64/fpsimd: ptrace: Gracefully handle errors\")\n\n... where the setting of TIF_SVE was moved into a block which is only\nexecuted when system_supports_sme() is true.\n\nFix this by removing the system_supports_sme() check. This ensures that\nTIF_SVE is set for (SVE-formatted) writes to NT_ARM_SVE, at the cost of\nunconditionally manipulating the tracee\u0027s saved svcr value. The\nmanipulation of svcr is benign and inexpensive, and we already do\nsimilar elsewhere (e.g. during signal handling), so I don\u0027t think it\u0027s\nworth guarding this with system_supports_sme() checks.\n\nAside from the above, there is no functional change. The \u0027type\u0027 argument\nto sve_set_common() is only set to ARM64_VEC_SME (in ssve_set())) when\nsystem_supports_sme(), so the ARM64_VEC_SME case in the switch statement\nis still unreachable when !system_supports_sme(). When\nCONFIG_ARM64_SME=n, the only caller of sve_set_common() is sve_set(),\nand the compiler can constant-fold for the case where type is\nARM64_VEC_SVE, removing the logic for other cases."
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    "datePublished": "2026-02-14T15:09:47.048Z",
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This occurs before any other\\ncheck of TIF_SVE can possibly occur, as other checks of TIF_SVE only\\nhappen while the FPSIMD/SVE/SME state is live. Thus, aside from the\\nwarning, there is no functional issue.\\n\\nThis bug was introduced during rework to error handling in commit:\\n\\n  9f8bf718f2923 (\\\"arm64/fpsimd: ptrace: Gracefully handle errors\\\")\\n\\n... where the setting of TIF_SVE was moved into a block which is only\\nexecuted when system_supports_sme() is true.\\n\\nFix this by removing the system_supports_sme() check. This ensures that\\nTIF_SVE is set for (SVE-formatted) writes to NT_ARM_SVE, at the cost of\\nunconditionally manipulating the tracee\u0027s saved svcr value. The\\nmanipulation of svcr is benign and inexpensive, and we already do\\nsimilar elsewhere (e.g. during signal handling), so I don\u0027t think it\u0027s\\nworth guarding this with system_supports_sme() checks.\\n\\nAside from the above, there is no functional change. The \u0027type\u0027 argument\\nto sve_set_common() is only set to ARM64_VEC_SME (in ssve_set())) when\\nsystem_supports_sme(), so the ARM64_VEC_SME case in the switch statement\\nis still unreachable when !system_supports_sme(). When\\nCONFIG_ARM64_SME=n, the only caller of sve_set_common() is sve_set(),\\nand the compiler can constant-fold for the case where type is\\nARM64_VEC_SVE, removing the logic for other cases.\"},{\"lang\":\"es\",\"value\":\"En el kernel de Linux, se ha resuelto la siguiente vulnerabilidad:\\n\\narm64/fpsimd: ptrace: Corrige escrituras SVE en sistemas sin SME\\n\\nCuando SVE es compatible pero SME no lo es, una escritura de ptrace al regset NT_ARM_SVE puede colocar al tracee en un estado inv\u00e1lido donde los datos del registro SVE (no streaming) se almacenan en formato FP_STATE_SVE pero TIF_SVE est\u00e1 en cero. Esto puede resultar en una advertencia posterior de fpsimd_restore_current_state(), por ejemplo:\\n\\n  WARNING: CPU: 0 PID: 7214 at arch/arm64/kernel/fpsimd.c:383 fpsimd_restore_current_state+0x50c/0x748\\n\\nCuando esto sucede, fpsimd_restore_current_state() establecer\u00e1 TIF_SVE, colocando la tarea en el estado correcto. Esto ocurre antes de que cualquier otra verificaci\u00f3n de TIF_SVE pueda ocurrir, ya que otras verificaciones de TIF_SVE solo suceden mientras el estado FPSIMD/SVE/SME est\u00e1 activo. Por lo tanto, aparte de la advertencia, no hay ning\u00fan problema funcional.\\n\\nEste error fue introducido durante una revisi\u00f3n del manejo de errores en el commit:\\n\\n  9f8bf718f2923 (\u0027arm64/fpsimd: ptrace: Manejar errores con gracia\u0027)\\n\\n... donde la configuraci\u00f3n de TIF_SVE se movi\u00f3 a un bloque que solo se ejecuta cuando system_supports_sme() es verdadero.\\n\\nEsto se soluciona eliminando la verificaci\u00f3n de system_supports_sme(). Esto asegura que TIF_SVE se establezca para escrituras (con formato SVE) a NT_ARM_SVE, a costa de manipular incondicionalmente el valor svcr guardado del tracee. La manipulaci\u00f3n de svcr es inofensiva y de bajo costo, y ya hacemos algo similar en otros lugares (por ejemplo, durante el manejo de se\u00f1ales), por lo que no creo que valga la pena condicionar esto a verificaciones de system_supports_sme().\\n\\nAparte de lo anterior, no hay ning\u00fan cambio funcional. El argumento \u0027type\u0027 de sve_set_common() solo se establece en ARM64_VEC_SME (en ssve_set()) cuando system_supports_sme(), por lo que el caso ARM64_VEC_SME en la declaraci\u00f3n switch sigue siendo inalcanzable cuando system_supports_sme() es falso. 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    "redhat_vex": {
      "aggregate_severity": "Low",
      "current_release_date": "2026-06-28T07:18:49+00:00",
      "cve": "CVE-2026-23114",
      "id": "CVE-2026-23114",
      "initial_release_date": "2026-02-14T00:00:00+00:00",
      "product_status:known_affected": "76",
      "product_status:known_not_affected": "198",
      "source": "Red Hat CSAF VEX",
      "status": "final",
      "title": "kernel: arm64/fpsimd: ptrace: Fix SVE writes on !SME systems",
      "url": "https://security.access.redhat.com/data/csaf/v2/vex/2026/cve-2026-23114.json",
      "version": "3"
    },
    "suse_vex": {
      "aggregate_severity": "moderate",
      "current_release_date": "2026-05-06T01:45:07Z",
      "cve": "CVE-2026-23114",
      "id": "CVE-2026-23114",
      "initial_release_date": "2026-02-18T00:25:50Z",
      "product_status:known_affected": "4",
      "product_status:known_not_affected": "245",
      "source": "SUSE CSAF VEX",
      "status": "interim",
      "title": "SUSE CVE CVE-2026-23114",
      "url": "https://ftp.suse.com/pub/projects/security/csaf-vex/cve-2026-23114.json",
      "version": "7"
    }
  }
}



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Forecast uses a logistic model when the trend is rising, or an exponential decay model when the trend is falling. Fitted via linearized least squares.

Sightings

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  • Seen: The vulnerability was mentioned, discussed, or observed by the user.
  • Confirmed: The vulnerability has been validated from an analyst's perspective.
  • Published Proof of Concept: A public proof of concept is available for this vulnerability.
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  • Patched: The vulnerability was observed as successfully patched by the user who reported the sighting.
  • Not exploited: The vulnerability was not observed as exploited by the user who reported the sighting.
  • Not confirmed: The user expressed doubt about the validity of the vulnerability.
  • Not patched: The vulnerability was not observed as successfully patched by the user who reported the sighting.


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